1. Field of the Invention
The present invention relates to a semiconductor device having element isolation regions and to a manufacturing method thereof.
2. Description of the Background Art
FIGS. 67 to 76 are diagrams that show the process steps of a conventional semiconductor device manufacturing method. Such a manufacturing method is described in, for example, xe2x80x9cIEEE Transaction on Electron Devices,xe2x80x9d Vol. ED-33, No. 11 November 1986, PP. 1659-1666. FIGS. 67 to 76 are all cross-sectional views that show an MOS (Metal Oxide Semiconductor) transistor in the gate width direction.
First, thermal oxidation is applied to the surface of a semiconductor substrate 1, a silicon substrate, to form a silicon oxide film 2 (FIG. 67). Next, photoresist 3 is applied on the silicon oxide film 2. Then, in order to form the active region of the MOS transistor, an opening 3a is formed in the photoresist 3 by using photolithography technique (FIG. 68).
Subsequently, dry etching is selectively applied in the opening 3a by using the photoresist 3 as a mask, so as to remove the part of the silicon oxide film 2 right under the opening 3a. An opening 4 for the formation of the active region is thus formed in the silicon oxide film 2 (FIG. 69). This process step also forms the silicon oxide film 2 as element isolation regions.
Next, an epitaxial silicon layer 5 is formed in the active region formation opening 4 by selective epitaxial growth (FIG. 70). In this process step, the epitaxial silicon layer 5 is formed to a sufficient height (to a level higher than the surface level of the silicon oxide film 2) in the active region formation opening 4. Accordingly the epitaxial silicon layer 5 is somewhat formed also on the silicon oxide film 2.
After that, the surface is etched back or chemical-mechanical-polished (CMP) for planarization of the surface of the epitaxial silicon layer 5 (FIG. 71). A silicon layer 6 for the active region formation is thus formed in the active region formation opening 4. During this planarization process, the silicon oxide film 2 can be used as an etching stopper or a polishing stopper by taking advantage of the etch selectivity or polish selectivity between the epitaxial silicon layer 5 and the silicon oxide film 2.
Next, thermal oxidation is applied to the surface of the active region formation silicon layer 6 to form a sacrificial silicon oxide film 7 (FIG. 72). Then ion implantation 8 for well and channel formation is applied through the sacrificial silicon oxide film 7 (FIG. 73). The sacrificial silicon oxide film 7 is a sacrificed layer which sacrificially undergoes damage during the ion implantation 8, for the active region formation silicon layer 6 and the semiconductor substrate 1.
Then the sacrificial silicon oxide film 7 is removed by wet etching using HF (FIG. 74). Subsequently a silicon oxide film and a polycrystalline silicon film are formed on the surface of the semiconductor substrate 1, which are then patterned to form a gate oxide film 10 and a gate electrode 12 of the MOS transistor (FIG. 75).
According to this conventional semiconductor device manufacturing method, the silicon oxide film 2 is formed into the element isolation regions in the steps of FIGS. 68 and 69 through photolithography and etching techniques. Hence the element isolation regions are free from bird""s beaks, as would be caused by LOCOS (Local Oxidation of Silicon), and also free from seams and voids, as would be caused by the trench isolation. The element isolation regions therefore provide good insulation.
In the conventional semiconductor device manufacturing method shown above, however, as shown in FIG. 74, recesses 9 are likely to form in the silicon oxide film 2 during the removal of the sacrificial silicon oxide film 7. The removal of the sacrificial silicon oxide film 7 uses not dry etching but wet etching, so as to prevent further damage. Since the wet etching is isotropic, it is likely to remove the parts of the silicon oxide film 2 which are located at the edges of the sacrificial silicon oxide film 7, thus forming the recesses 9. FIG. 76 is a diagram that shows the region 11 in FIG. 75 in an enlarged manner.
Now, in MOS transistors, it is desired that the channel width W and the threshold voltage Vth be in a relation as shown by the graph GR1 in FIG. 77. That is to say, it is desired that the threshold voltage Vth keep a constant value irrespective of the channel width W.
However, in reality, as shown by the graph GR2 in FIG. 77, the threshold voltage Vth decreases as the channel width W diminishes: this is a so-called inverse narrow channel effect. When the inverse narrow channel effect is noticeable, it reduces the design margin of the MOS transistor. Especially, in devices with reduced dimensions, the threshold Vth greatly varies with dimensional variations, leading to unstable operations of the MOS transistors.
It is thought that the inverse narrow channel effect is caused by influence of the electric fields at the gate edges in the gate-width direction. That is to say, it is supposed that the inverse narrow channel effect becomes more noticeable as the electric fields 11a and 11b at the gate edge in FIG. 76 become stronger.
The recess 9 in the silicon oxide film 2 causes the material of the gate electrode 12 to form in an acute angle in the recess 9, which increases the strength of the electric field 11a upon application of the gate voltage. Accordingly, the conventional semiconductor device manufacturing method shown above results in MOS transistors that are likely to induce the inverse narrow channel effect; the method thus involves difficulties in manufacturing MOS transistors with good characteristics.
An object of this invention is to provide a semiconductor device which is less likely to induce the inverse narrow channel effect and a manufacturing method thereof.
According to a first aspect of the invention, a semiconductor device includes: a semiconductor substrate; element isolation regions made of a silicon nitride film provided on the semiconductor substrate; and a semiconductor layer formed by epitaxial growth in a region interposed between the element isolation regions on the semiconductor substrate.
A semiconductor device has element isolation regions made of a silicon nitride film provided on a semiconductor substrate and a semiconductor layer formed by epitaxial growth in a region interposed between the element isolation regions on the semiconductor substrate. Accordingly, when a sacrificial layer of silicon oxide film is formed in the surface of the semiconductor layer, ion implantation is applied through the sacrificial layer, and then the sacrificial layer is removed by etching, recesses are less likely to be formed by the etching in the element isolation regions. As a result, when a gate electrode is formed on the surface of the semiconductor layer, the gate electrode is not formed in acute angles on the element isolation regions, and a semiconductor device which is less susceptible to the inverse narrow channel effect can thus be obtained.
According to a second aspect, a semiconductor device includes: a semiconductor substrate; element isolation regions made of a silicon oxynitride film provided on the semiconductor substrate; and a semiconductor layer formed by epitaxial growth in a region interposed between the element isolation regions on the semiconductor substrate.
A semiconductor device has element isolation regions made of a silicon oxynitride film provided on a semiconductor substrate and a semiconductor layer formed by epitaxial growth in a region interposed between the element isolation regions on the semiconductor substrate. Accordingly, when a sacrificial layer of silicon oxide film is formed in the surface of the semiconductor layer, ion implantation is applied through the sacrificial layer, and then the sacrificial layer is removed by etching, recesses are less likely to be formed by the etching in the element isolation regions. As a result, when a gate electrode is formed on the surface of the semiconductor layer, the gate electrode is not formed in acute angles on the element isolation regions, and a semiconductor device less susceptible to the inverse narrow channel effect can thus be obtained. Also, in the case of the silicon oxynitride film, the edges of the element isolation regions are likely to be rounded during the etching to the sacrificial layer. This structure further prevents the inverse narrow channel effect. Moreover, the thermal expansion coefficient of the silicon oxynitride film is closer, than that of the silicon oxide film, to the thermal expansion coefficient of silicon, so that the silicon substrate is subjected to smaller stress than when the silicon oxide film is used.
According to a third aspect, a semiconductor device includes: a semiconductor substrate; element isolation regions provided on the semiconductor substrate; and a semiconductor layer formed by epitaxial growth in a region interposed between the element isolation regions on the semiconductor substrate. The element isolation regions are made of a stacked film composed of a silicon oxide film provided on the semiconductor substrate and a silicon nitride film provided on the silicon oxide film, and the silicon nitride film has a refractive index of 2.0 or more.
The element isolation regions are formed of a stacked film composed of a silicon oxide film provided on the semiconductor substrate and a silicon nitride film provided on the silicon oxide film. The silicon nitride film is thus provided in the surface side of the element isolation regions. Accordingly, when a sacrificial layer of silicon oxide film is formed in the surface of the semiconductor layer, ion implantation is applied through the sacrificial layer, and then the sacrificial layer is removed by etching, recesses are less likely to be formed by the etching in the element isolation regions. As a result, when a gate electrode is formed on the surface of the semiconductor layer, the gate electrode is not formed in acute angles on the element isolation regions, and a semiconductor device less susceptible to the inverse narrow channel effect can thus be obtained. Furthermore, since the silicon nitride film resides in the upper layer, the semiconductor substrate is subjected to reduced stress. The silicon nitride film has a refractive index of 2.0 or greater. The silicon nitride film then offers a smaller etch rate with respect to HF, so that, when the sacrificial layer is removed by etching using HF, recesses are still less likely to be formed by the etching in the element isolation regions.
According to a fourth aspect, a semiconductor device includes: a semiconductor substrate; element isolation regions provided on the semiconductor substrate; and a semiconductor layer formed by epitaxial growth in a region between the element isolation regions on the semiconductor substrate. The element isolation regions are made of a stacked film composed of an undoped silicon oxide film provided on the semiconductor substrate and a silicon oxynitride film provided on the undoped silicon oxide film, and the silicon oxynitride film has a refractive index of 1.7 or more, and less than 2.0.
The element isolation regions are formed of a stacked film composed of an undoped silicon oxide film provided on the semiconductor substrate and a silicon oxynitride film provided on the undoped silicon oxide film. The silicon oxynitride film is thus provided in the surface side of the element isolation regions. Accordingly, when a sacrificial layer of silicon oxide film is formed in the surface of the semiconductor layer, ion implantation is applied through the sacrificial layer, and then the sacrificial layer is removed by etching, recesses are less likely to be formed by the etching in the element isolation regions. As a result, when a gate electrode is formed on the surface of the semiconductor layer, the gate electrode is not formed in acute angles on the element isolation regions, and a semiconductor device less susceptible to the inverse narrow channel effect can thus be obtained. Furthermore, since the silicon oxynitride film resides in the upper layer, the semiconductor substrate is subjected to less stress. The silicon oxynitride film has a refractive index of 1.7 or greater, and smaller than 2.0. The silicon oxynitride film therefore offers a smaller etch rate with respect to HF, so that, when the sacrificial layer is removed by etching using HF, recesses are still less likely to be formed by the etching in the element isolation regions.
According to a fifth aspect, a semiconductor device includes: a semiconductor substrate; element isolation regions provided on the semiconductor substrate; and a semiconductor layer formed by epitaxial growth in a region between the element isolation regions on the semiconductor substrate. The element isolation regions are made of a silicon oxynitride film provided on the semiconductor substrate, and the silicon oxynitride film has a higher nitrogen concentration in its surface-side portion which is distant from the semiconductor substrate than in its portion on the semiconductor substrate side.
The element isolation regions are formed of a silicon oxynitride film provided on the semiconductor substrate, and the nitrogen concentration in its surface-side portion distant from the semiconductor substrate is higher than the nitrogen concentration in its portion on the semiconductor substrate side. Thus the silicon oxynitride film having a higher nitrogen concentration is provided in the surface side of the element isolation regions. Accordingly, when a sacrificial layer of silicon oxide film is formed in the surface of the semiconductor layer, ion implantation is applied through the sacrificial layer, and then the sacrificial layer is removed by etching, the etching is less likely to form recesses in the element isolation regions. As a result, when a gate electrode is formed on the surface of the semiconductor layer, the gate electrode is not formed in acute angles on the element isolation regions, and a semiconductor device less susceptible to the inverse narrow channel effect can thus be obtained. Furthermore, as compared with the silicon oxide film, the silicon oxynitride film has a thermal expansion coefficient closer to that of silicon, so that the silicon substrate is subjected to smaller stress than when the silicon oxide film is used.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.